BUT11AF datasheet, BUT11AF pdf, BUT11AF data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, NPN Silicon Transistor. BUT11AF. GENERAL DESCRIPTION. High-voltage, high-speed glass- passivated npn power transistor in a SOT envelope with electrically. BUT11AF NPN Silicon Transistor. Absolute Maximum Ratings TC=25°C unless otherwise noted. Symbol VCBO Parameter Collector-Base Voltage: BUT11AF.
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Test circuit inductive load. August 7 Rev 1. Observe the general handling precautions for electrostatic-discharge sensitive devices ESDs to prevent damage to MOS gate oxide.
Test circuit resistive load. Stress above one or more of the limiting values may cause permanent damage to the device.
SOT; The seating plane is electrically isolated from all terminals. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. August 2 Rev 1. Product specification This data sheet contains final product specifications. Typical DC current gain. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
Transistor BUT11AF, NPN, TO-220F
Exposure to limiting values for extended periods may affect device reliability. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Oscilloscope display for VCEOsust. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
Reverse bias safe operating area. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied.
BUT11AF datasheet, Pinout ,application circuits NPN Silicon Transistor
No liability will be accepted by the publisher for any consequence of its use. Refer to mounting instructions for F-pack envelopes. Normalised power derating and second breakdown curves. UNIT – – 1. Typical base-emitter saturation voltage.
Forward bias safe operating area. August 4 Ptot max and Ptot peak max lines. Switching times waveforms with resistive load.
BUT11AF Datasheet pdf – NPN Silicon Transistor – Fairchild Semiconductor
The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. Switching times waveforms with inductive load.
August 8 Rev 1. Region of permissible DC operation.
Typical base-emitter and collector-emitter saturation voltages. Test circuit for VCEOsust. Application information Where application information is given, it is advisory and does not form part of the datzsheet.
Extension for repetitive pulse operation.